Learn about Neoverse Non-cache PMU events using C and Assembly Language
Introduction
Introduction to the PMU
Topdown Methodology L1 Events
TLB Events
Operation Mix Events
Next Steps
Learn about Neoverse Non-cache PMU events using C and Assembly Language
Who is this for?
This is an advanced topic for software and hardware engineers to learn about why common non-cache PMU events occur.
What will you learn?
Upon completion of this Learning Path, you will be able to:
- Describe common non-cache PMU events.
- Understand why specific code triggers specific PMU events on the Neoverse N2 Core.
Prerequisites
Before starting, you will need the following:
- Some familiarity with performance analysis.
- The ability to read Arm assembly code.