# Develop and validate firmware pre-silicon on Arm Neoverse CSS V3

## In this learning path

- [Introduction](https://learn.arm.com/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/)
- [Learn about the Arm RD-V3 Platform](https://learn.arm.com/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/1_introduction_rdv3/)
- [Understand the CSS-V3 boot flow and firmware stack](https://learn.arm.com/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/2_rdv3_bootseq/)
- [Build the RD-V3 Reference Platform Software Stack](https://learn.arm.com/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/3_rdv3_sw_build/)
- [Simulate RD-V3 Boot Flow on Arm FVP](https://learn.arm.com/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/4_rdv3_on_fvp/)
- [Simulate Dual Chip RD-V3-R1 Platform](https://learn.arm.com/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/5_rdv3_modify/)
- [Next Steps](https://learn.arm.com/learning-paths/servers-and-cloud-computing/neoverse-rdv3-swstack/_next-steps/)

## About this Learning Path

| Skill level:         | Advanced         |
|---------------------|-----------------|
| Reading time:       | 1 hr 30 min     |
| Last updated:       | 02 Oct 2026     |

| Authors:            |                  |
|---------------------|-----------------|
| Odin Shen, Arm      | [GitHub](https://github.com/odincodeshen), [LinkedIn](https://linkedin.com/in/odin-shen-lmshen) |
| Ann Cheng, Arm      | [GitHub](https://github.com/anncheng-arm), [LinkedIn](https://linkedin.com/in/hello-ann) |
| Arm IP:             | [Neoverse](https://support.arm.com/?tab=compute-ip&Product%20Type=Infrastructure%20Processors) |
| Tags:               | Containers and Virtualization, AWS Graviton, Microsoft Azure Cobalt, Google Axion, Oracle Cloud Infrastructure (OCI) Ampere Compute, Linux, C, Docker, FVP |

## Who is this for?

This advanced topic is for firmware developers, system architects, and silicon validation engineers working on Arm Neoverse CSS platforms who require a pre-silicon workflow for the CSS-V3 reference design using Fixed Virtual Platforms (FVPs).

## What will you learn?

After completing this Learning Path, you'll be able to perform the following tasks:

- Understand the CSS-V3 architecture and the RD-V3 firmware boot sequence.
- Set up a containerized build environment and sync sources with a pinned manifest using repo.
- Build and boot the RD-V3 firmware stack on FVP and map UART consoles to components.
- Interpret boot logs to verify bring-up and diagnose boot-stage issues.
- Modify platform control firmware such as System Control Processor (SCP) and Manageability Control Processor (MCP), and validate changes through pre-silicon simulation.
- Launch a dual-chip RD-V3-R1 simulation and verify application processor (AP) and MCP coordination.

## Prerequisites

Before starting, you'll need the following prerequisites:

- Access to an Arm Neoverse-based Linux machine (cloud or local) with at least 80 GB of free storage
- Familiarity with Linux command-line tools and basic scripting
- Understanding of firmware boot stages and SoC-level architecture
- Docker installed, or a GitHub Codespaces-compatible development environment

## Summary

You’ll build the Arm Neoverse RD-V3 firmware stack and test it on an Arm FVP before hardware is available. First, you’ll prepare a repeatable environment, sync pinned sources, compile the boot chain, and select the FVP version that matches your release. You’ll then map UART consoles, follow the boot to a Buildroot Linux shell, validate firmware changes, and run the dual-chip RD-V3-R1 simulation.

## Frequently asked questions

<details>
<summary>How do I choose the correct FVP model for my RD-V3 build?</summary>
Match your FVP version to your RD-V3 release tag. For `RD-INFRA-2025.07.03`, use FVP version `11.29.35`. Check the release tags list for other version mappings.
</details>

<details>
<summary>What result should I expect when the single-die simulation boots successfully?</summary>
In `terminal_ns_uart0`, select **RD-V3 Buildroot** from the GRUB menu and press **Enter**. You should see `Welcome to Buildroot`, then a `buildroot login:` prompt. Log in as `root` to reach the Linux shell.
</details>

<details>
<summary>Where can I find the UART logs from the RD-V3 simulation?</summary>
Look in `~/rdv3/model-scripts/rdinfra/platforms/rdv3/rdv3`, where each UART is redirected to its own log file. Use the UART-to-terminal mapping to identify the subsystem you want to inspect, such as Linux, TF-A and UEFI, SCP, RSE, MCP, or LCP.
</details>

<details>
<summary>How do I validate the MCP firmware change on RD-V3-R1?</summary>
Add `FWK_LOG_CRIT("[FWK] Customer code here");` in `fwk_module_start()` in `~/rdv3r1/host/scp/framework/src/fwk_module.c`. Rebuild and repackage with `rdv3r1` build commands, then relaunch the FVP. Check your MCP UART output for `[FWK] Customer code here` to confirm that your change executes.
</details>

<details>
<summary>How do I know the dual-chip RD-V3-R1 simulation is running correctly?</summary>
After launching `./boot-buildroot.sh -p rdv3r1`, check the UART consoles to verify that both application processors, AP0 and AP1, boot in coordination. You can inspect the additional MCP console and logs in `~/rdv3r1/model-scripts/rdinfra/platforms/rdv3r1/rdv3r1`.
</details>