Characterize the memory subsystem of an Arm Linux system using ASCT
Introduction
Identify Arm CPU topology, cache hierarchy, and NUMA configuration
Analyze Arm cache hierarchy and performance characteristics
Measure Arm cache and memory latency using ASCT pointer chase
Measure Arm single-core memory bandwidth with ASCT
Measure Arm multi-core memory bandwidth and loaded latency with ASCT
Compare Arm memory subsystem performance across systems
Next Steps
Characterize the memory subsystem of an Arm Linux system using ASCT
Introduction
Identify Arm CPU topology, cache hierarchy, and NUMA configuration
Analyze Arm cache hierarchy and performance characteristics
Measure Arm cache and memory latency using ASCT pointer chase
Measure Arm single-core memory bandwidth with ASCT
Measure Arm multi-core memory bandwidth and loaded latency with ASCT
Compare Arm memory subsystem performance across systems
Next Steps
Who is this for?
This is an advanced topic for software developers and performance engineers who want to understand and characterize the CPU-side memory subsystem of Arm Linux systems.
What will you learn?
Upon completion of this Learning Path, you will be able to:
- Identify the core topology, cluster layout, and cache hierarchy of an Arm Linux system using standard tools
- Measure cache and memory latency using a pointer-chase benchmark
- Measure single-core and multi-core streaming bandwidth at each level of the memory hierarchy
- Evaluate latency behavior under bandwidth pressure
- Compare results across Arm systems and draw conclusions
Prerequisites
Before starting, you will need the following:
- Two or more Arm Linux systems with root or sudo access. The examples use AWS Graviton2 and Graviton4 instances, but other systems are possible
- Arm System Characterization Tool (ASCT) installed on each system
- A good understanding of CPU memory subsystems, including cache hierarchies, cache lines, and DRAM in the memory hierarchy