Introduction
Identify Arm CPU topology, cache hierarchy, and NUMA configuration
Analyze Arm cache hierarchy and performance characteristics
Measure Arm cache and memory latency using ASCT pointer chase
Measure Arm single-core memory bandwidth with ASCT
Measure Arm multi-core memory bandwidth and loaded latency with ASCT
Compare Arm memory subsystem performance across systems
Next Steps
| Skill level: | Advanced |
| Reading time: | 1 hr |
| Last updated: | 09 Apr 2026 |
| Skill level: |
| Advanced |
| Reading time: |
| 1 hr |
| Last updated: |
| 09 Apr 2026 |
This is an advanced topic for software developers and performance engineers who want to understand and characterize the CPU-side memory subsystem of Arm Linux systems.
Upon completion of this Learning Path, you will be able to:
Before starting, you will need the following: