# Design an AXI-Lite peripheral to control GPIOs

## In this learning path

- [Introduction](https://learn.arm.com/learning-paths/embedded-and-microcontrollers/advanced_soc/)
- [Setup a Workspace in Xilinx Vivado](https://learn.arm.com/learning-paths/embedded-and-microcontrollers/advanced_soc/setup/)
- [Create a custom AXI4 Peripheral](https://learn.arm.com/learning-paths/embedded-and-microcontrollers/advanced_soc/creating_peripheral/)
- [Connect AXI4 Peripheral to ZYNQ Processing System](https://learn.arm.com/learning-paths/embedded-and-microcontrollers/advanced_soc/connecting_peripheral/)
- [Generate the bitstream and write your application using Vitis IDE](https://learn.arm.com/learning-paths/embedded-and-microcontrollers/advanced_soc/generating_bitstream/)
- [Next Steps](https://learn.arm.com/learning-paths/embedded-and-microcontrollers/advanced_soc/_next-steps/)

## About this Learning Path

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| Skill level: | Introductory |
| Reading time: | 1 hr |
| Last updated: | 08 Jul 2026 |

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| Author: | Pareena Verma , Arm<br>[GitHub](https://github.com/pareenaverma)<br>[LinkedIn](https://linkedin.com/in/pareena-verma-7853607) |
| Arm IP: | [Cortex-A](https://support.arm.com/?tab=compute-ip&Product%20Type=Application%20Processors) |
| Tags: | [Performance and Architecture](https://learn.arm.com/tag/performance-and-architecture) [Baremetal](https://learn.arm.com/tag/baremetal) [C](https://learn.arm.com/tag/c) |

## Who is this for?
This is an introductory topic for software developers interested in System on Chip Design.

## What will you learn?
After completing this Learning Path, you'll be able to perform the following tasks:
- Configure and integrate an AXI-Lite peripheral with a Cortex-A9 Processing System.
- Program the Cortex-A9 processor to read the state of switches and control the LEDs using a C program.
- Demonstrate a basic functional system that lights up the LEDs based on the status of the switches.

## Prerequisites
Before starting, you'll need the following prerequisites:
- Some familiarity with Verilog
- Basic understanding of System on Chip design
- A ‘Zybo Z7-10’ development board

## Summary
You’ll design and integrate a custom AXI4-Lite peripheral with the ZYNQ Processing System on a Zybo Z7-10 board. First, you’ll create a clean Vivado workspace. Then, you’ll follow the **Create and Package New IP** flow to build the peripheral, and add external ports for LEDs and switches with the shown bit widths. You’ll create a block design that connects the peripheral to the Cortex-A9–based processing system, followed by generating an HDL wrapper and a bitstream. Using Vitis IDE, you’ll write a bare-metal C program that reads switch inputs over AXI-Lite and drives LED outputs. You’ll see LEDs responding to switch states through the custom IP.

## Frequently asked questions

**What should I check about the Vivado workspace path before creating the project?**

Use a path with no spaces. A simple top-level directory such as `C:/Workspace` avoids path issues.

**Which option should I select in the **Create and Package New IP** wizard?**

Select **Create a new AXI4 peripheral**. This generates the template files for an AXI-compliant custom IP block.

<summary>How do I know the `led` and `sw` ports are configured correctly?</summary>
Confirm `led` is an output and `sw` is an input, each with the width shown in the steps (four bits). They should appear as external ports in the block design and connect to your custom peripheral.

**What should I do before generating the bitstream?**

Create the HDL wrapper for `design1.bd` using the default options and save all changes. Then proceed to generate the bitstream.

**What result should I expect when I run the C application in Vitis?**

The LEDs change based on the state of the switches. Toggling a switch updates the corresponding LED as defined by your application.